Designing Built-in Test (BIT) or Built-In Self Test (BIST) capabilities into semiconductor devices (i.e. chips) is a well-known technique used to place the circuitry needed to perform critical performance tests directly on the chip rather than off chip. Without the built in test circuitry, external test equipment must be used to perform the various performance tests. Several limitations of using external test equipment include making connections to the on-chip circuitry through a limited number of contact points or pins, requiring expensive test equipment capable of performing RF measurements, and requiring an extended testing time typical of such measurements. On-chip digital or software based mechanisms, which serve to substitute for such external setups, offer significant reduction in testing costs without resulting in a noticeable increase in chip cost.
Manufacturers designing and building products such as communication devices, often design their products to operate in accordance with industry standards. One such standard is the Bluetooth short-range wireless standard. In order to insure conformance with the standard, qualification tests are performed on the products as part of the manufacturing process. Typically, the testing of communication devices requires the device to be connected to one or more pieces of external test equipment that perform a battery of tests to insure compliance with the standard. The test equipment used is typically bulky in size, costly and requires routine maintenance and calibration of its own.
To test radio frequency integrated circuits (RFICs), such as RF transceivers, in a production environment, a dedicated mixed signal tester having RF capabilities is typically required. Such testers, however, are very expensive to obtain and maintain due to calibration and maintenance requirements, etc. The cost of these testers adds significantly to the cost of testing each integrated circuit (IC) which reduces the profit margin of the IC.
Considering the receiver portion of an RF transceiver, the communication standard, or specifications it was designed to target, specifies requirements for the receiver sensitivity. The Bluetooth standard, for example, stipulates that for a Bluetooth modulated RF input signal at −70 dBm power level, the data output of the receiver must have a maximum bit error rate (BER) of 10−3. Thus, all receivers must be tested for compliance with this figure, or one exceeding it that may have been targeted in the device specification, and those parts failing to meet the sensitivity requirements should be rejected.
A block diagram illustrating an example prior art test scheme for testing the sensitivity of a receiver is shown in FIG. 1. The test scheme, generally referenced 10, comprises the transceiver 12, i.e. the device under test (DUT) and external test equipment including a BER meter 30 and RF generator 26. The transceiver 12 comprises a baseband processor 14 and transmit and receive paths. The transmit path comprises a data shaping circuit 16, shared oscillator 18, power amplifier 19 and T/R switch or combining circuit 20. The receive path comprises a low noise amplifier (LNA) 21, mixer 22 and receiver IF and demodulator 24. Note that the BER meter and RF generator may be combined into a single device.
The baseband processor comprises a user data in port, user data out port, Rx in port and Tx out port. During transmission, the receiver portion is shut down or disabled and the Tx data out is input to the data shaping circuit the output of which modulates the oscillator. The output of the oscillator, which is shared between the transmitter and the receiver, is input to the power amplifier and output through the T/R switch or combiner network to the antenna (not shown). During reception, the received RF signal is input to the LNA. Under normal operation, the RF input signal received from the antenna is a signal modulated in accordance with the particular implementation, e.g., Bluetooth modulation. The output of the LNA is input to one of the two inputs of the mixer. The oscillator is configured to run at the appropriate center frequency without any modulation and the non-modulated oscillator signal is the second input to the mixer. The IF signal output of the mixer is input to the remainder of the receiver chain and the Rx data output is input to the baseband processor.
During testing, the test pattern generator 32 in the BER meter is configured to generate a test sequence which is input to the modulation input of an RF generator with modulation capability. Such test devices are relatively expensive and increase the cost of testing. The RF generator produces an RF modulated output signal at a desired attenuation level, e.g., −70 dBm, which is input to the RF port of the transceiver in place of the antenna. The data output of the transceiver DUT is input to the BER meter which functions to compute a BER result. The BER result is used to determine whether the chip passes or should be discarded.
In testing RFICs, one of the most crucial parameters to be measured is the dynamic range of the input signal. This dynamic range is the maximum and minimum input power levels at which the radio still exhibits acceptable performance. These measurements are typically performed at the system level using a BER measurement such as described above. Other system parameters may also be considered including the effects of blockers and interferers, as well as input frequency error effects, all of which can also be characterized with a BER test. Prior art testing requires that the RF tester provide a modulated source (whether digital or analog) which is subsequently input to the front end of the receiver IC. The data output from the receiver is then compared to the original data using external hardware or software means to provide a BER measurement.
A disadvantage of the prior art test scheme described above is that the RF test equipment needed to perform such tests is typically very expensive, driving up the overall cost of manufacturing the chip which in turn decreases profit margins. In particular, the requirement to provide a modulated RF test signal at the appropriate power level is burdensome in terms of cost and measurement time due to the need to employ expensive RF generators with built-in modulation capability. In addition, the measurement time required by such external RF capable test equipment is relatively long. A long measurement time limits the throughput of integrated circuit (IC) production and increases testing costs.
It is therefore desirable to be able to test the performance of an integrated RF transceiver chip, in particular the receiver front end, which due to its analog nature tends to have performance variances resulting from variances in the manufacturing process, using very low cost test equipment and which requires short measurement times so as not to limit the throughput rate of IC production and reduce production costs.